Op-Amp Imperfections: DC Offsets, Bias Currents & Speed Limits

[music] [music] Heat. Heat.

[music] Heat. Heat. [music]

[music] [music] Heat. Heat.

[music] Heat. Heat. Greetings. Welcome to electronic

circuits one. I am Bzad Rosabi and this is lecture number 45. This is my last lecture in this electronic circuits one

series. Today we will continue to look at opamp imperfections and see how they influence the performance of circuits

that use opamps. Uh first let's look at what we covered last time in terms of some of these effects. Uh we uh started

by looking at uh two other circuits that use opamps. Uh these are nonlinear circuits. We saw that we can build a

precision rectifier. Meaning a circuit that can rectify an input even though the input might be only a little above

zero only small a small positive value as opposed to a single diode where we would have to exceed 800 molts

approximately before the diode turns on and performs rectification. So we saw that by placing a diode around

an op amp from the output to the inverting input we can create uh this type of characteristic. So even for very

small positive values we uh V out follows the input this output follows the input. So that is uh passing the

signal and then for even small negative input the diode turns off and there's no current or resistance. So the output is

zero. Another type of circuit is a logarithmic amplifier log amp that has a

characteristic from the input to the output that looks like a log function. And to do this we place a bipolar

transistor in the feedback loop from the output back to the input. And again we saw that the circuit has this type of

characteristic. [clears throat] Then we uh talked about op amp non

idealities and we saw that one uh important non ideality is the offset voltage. And what that means is that

when we plot the input of the opam as a function of the uh sorry the output of the opam as a function of the input we

see that even though in the ideal case it crosses zero crosses the origin in actuality doesn't. is shifted to the

right or the left or equivalently shifted down or shifted up. And the point on the horizontal axis where the

output crosses zero is called the offset voltage. And we model that by a voltage source in series with one of the inputs.

We said that VS is a random quantity. So it has different values and different polarities positive and negative. So as

far as the polarity is concerned, we can put it here or we can put it here. it doesn't make any difference. Okay. So

today we will look at the effect of this offset on the performance of integrators. And in fact if you remember

when we studied integrators I said the integrator circuit I showed you would not work in the lab. And that's exactly

because of the problem of DC offsets. So uh that's what we will do and then we'll look at some other imperfections

of opamps such as the input bias currents and the finite speed. All right. So, let's talk about the

effect of DC offsets

on integrators. We draw an integrator and we insert a DC offset at the inverting or non-inverting

input of the op amp and then see what happens. All right. So here's our integrator

R1 here, C1 here and uh the input ordinarily goes here. The output is taken from here

and I need to insert a DC offset. Uh maybe I will insert it here. So I insert a DC offset here.

VOS and uh I would like to see what the circuit does in the presence of this

VOS. Okay. All right. Maybe actually what we will do is we'll set the input to zero.

In a sense we're using superposition and just see what the circuit does in the presence of the offset. So let's set

this to zero and uh analyze the circuit just with an offset.

Okay. Well, [clears throat] for these types of studies, we assume the opamp has a very high gain. Uh, so

we can assume that these two voltages are very close to each other. And now we need to find uh the output in terms of

vos. Now vos is a constant voltage. So the transfer function from here to here is

not very meaningful. Vos is constant, right? So we should look at something else. Maybe we should look at the time

response of the output when there is an offset here and see if it does something interesting and perhaps troublesome.

Okay. So then I start out by saying that C1 has a zero initial condition on it. No charge, no voltage. We have a

constant voltage here from the non-inverting input to zero. And we would like to find an expression for V

out as a function of time. uh does the output change with time or not? We don't know maybe. So let's

pursue that. Okay. So to do this uh we will write this voltage

as approximately equal to the offset voltage. We know that right? Uh because the gain of the op amp is

high. So as I said before from this fundamental equation if a z is very large and v out this whole thing is a

moderate amount v in1 and v in2 have to be very close to each other. So these two have to be very close to each other.

We can say this is also approximately equal to vos. Okay. So now let's go ahead and see what

happens. If this voltage is vos I know the current through r1 flowing this way.

R1 has zero on its left terminal, VOS on its right terminal. So the current through R1 is just VOS

over R1. Okay, that's easy. And this current must flow through C1 because it has nowhere

else to go. So the current through C1 flowing this way is also VOS over R1. All right. Now, if I have a current

through a capacitor, I can find its voltage. What we know is that the voltage on a capacitor is equal to C DV

/ DT. Sorry, the current through a capacitor is equal to C DV / DT. So, the voltage on the capacitor is 1 / C

integral of I DT. Okay. Okay. So the voltage on the capacitor which happens to be equal to V

out minus Vos that's the voltage difference from here to here. So V out minus VO is equal to 1 / C integral of I

DT I the current of the capacitor is VOS over R1. So, VO s over R1 is C1 DT. Okay, we do have to be careful with the

polarities here. The currents going this way. So, we have to pick this voltage minus this voltage and use that in these

expressions. Okay. So because vos and r1 are constant uh this reduces to v out

is equal to v o plus 1 / r1 c1 t. So this looks like this, right? It starts out

V out as a function of time. At time Z is equal to V OS. So it's right here. And

that makes sense because if the capacitor has no charge on it at time zero, it has zero voltage difference

from here to here. And because this voltage is already VS, this voltage has to be Vos as well. So

that's why we have Vos here. So the output starts at VOS and then takes off and rises linearly.

Oops, I messed up this drawing a little. So the output starts from VOS and then rises linearly.

Okay, but how far will this go? Well, this will go on until the opam just cannot produce a higher voltage.

Meaning that when this voltage hits the supply voltage of the opam or close to it, then that's where we stop. So, it

goes and eventually gets stuck somewhere. This would be near the supply voltage

uh maybe lower but uh somewhere around there. And that's what happens after you construct the integrator in the lab.

So at this point the output of the opam has hit the rail the supply rail and has saturated. So the opam is essentially

dead. Now if I come along and I apply my input the opam is dead. There's no gain. The gain from year to year is close to

zero. The circuit is not an integrator. We have nothing. So we say that the integrator has

integrated the DC offset of the op amp and reached saturation and that's why this

integrator does not work if you build in the lab because it is very unlikely that you can buy an op amp with zero offset

voltage. So any amount of acet that we have here 1 m volt.1 m volt 1 microvolt doesn't

matter will eventually give rise to this effect. So that's the pro sorry there's a v

offset here that I forgot in this expression. So it integrates its own offset and saturates.

Okay so that's the problem with this type of integrator and we have to find a fix for it. You see that in this case is

really just a functionality question. When we saw the effect of offset in the previous circuits, the inverting and

uninverting amplifiers, we had some amount of error at the output, the amplified offset. But here it's

detrimental. It's just it's just not an error. It's just dead. The circuit has died because of the saturation effect.

So we really have to fix it. Okay. So to fix the integrator so that the offset does not saturate it uh we

will uh play a game. So that's what we will do. So to fix the circuit

we take the integrator as before R1 C1

and of course there's an offset here. I can draw that offset as well. We know that

there's an offset in the op amp all the all the time and this is our input. And what we do is we add a resistor in

parallel with C1. So let's call that R2. And I claim that R2

does not allow the offset to be integrated indefinitely. It doesn't allow the offset to be

integrated. So let's see how that's possible. Okay. Well, uh maybe the best way to

think about this is to go to time infinity and see what happened. At time infinity, we are hoping that this

capacitor will have no current through it. If all the transients have died away all right, so what exactly happens if I

consider the previous case? I still have an offset here. Let's say the input is zero, which means I still have VOS here,

which means I still have a current of VOS over R1 through R1. Now, previously that current had to flow

through C1 and the voltage across C1 grew and grew and grew and that's what we got. But here the current through R1

doesn't have to flow through C1 at least at time infinity. It can flow through R2. So if it flows through R2, it

generates a voltage but that voltage does not grow with time. It's just a constant amount. So the output will have

a constant error in it but not something that grows with time and saturates the op amp. Okay. Okay, so the intuitive

explanation is that in the presence of an offset, this R1 needs to have a current like before, but that current

prefers to flow through the resistor, not through the capacitor if we wait long enough because all the transients

die away. Okay, so uh in that case we can find out what the output is if VN is zero. So

let's say uh so I'll write it here. If VN is zero.

Then uh what we have is this uh after all the transients have died away C1 is an open circuit and VOS sees an

amplifier from here to here which is a non-inverting amplifier because we took the output we went through a resistive

divider and we went to zero. So the output is simply equal to the amplified copy of the OS. Vos is

amplified by 1 + R2 / R1. Just like a an ordinary non-inverting amplifier. So it's equal to 1 + R2 / R1*

VOS. So yes, we do have some error at the output. this much this much DC is

sitting at the output riding on top of anything that's coming through the circuit. So when we apply our input the

input goes through the circuit generates an output but in addition to that we have this DC that's sitting there.

All right. So uh but what we what's important to remember is that uh VO over R1

prefers to flow through

R2 rather than through

C1 at t equals infinity.

So the the voltage elasticity capacitor does not grow indefinitely. The opam does not saturate. The opam only

produces this much offset. So if R2 over R1 is let's say 10, we amplify the offset by a factor of 11. If the offset

offset is 1 millolt, we have 10 11 molts 15 molts 20 molts of offset at the output which is not a huge deal as

opposed to when the opam saturated completely. Okay. So that is the fix. But now you

might ask is this circuit still an integrator by now that we have a resistor in parallel

with C1? Uh did we change the nature of the circuit? This does the circuit have any

resemblance to the integration that we saw before. All right. Well, let's analyze the

circuit in the frequency domain. find this transfer function from V in to V out and compare that to what we got here

and see if there's any resemblance to integration. If you remember the ideal integrator transfer function, so let me

write this here. So the ideal integrator transfer function as we found it last

time was uh a function with one pole at the

origin. So it was equal to min -1 / r1 c1 s right that's what we found last time. So

now we will find the transfer function of this new circuit and see how close it can be to that ideal transfer function.

Now when we are trying to find the transfer functions of course we're dealing with small signal analysis. Uh

this v is set to zero. So uh I need to find the transfer function of the circuit. So let me write. So actual or

the new integrator. So here's what we have. We have

a an R1 connected to the input and then we have a capacitor C1, a resistor R2 going to the output

and we would like to find the transfer function of this circuit. Again, as usual, we try to see if this

circuit resembles anything we have studied in the past so that we don't have to write KVLs and KCL's from

scratch. And indeed, this circuit resembles the general circuit I showed you last time. We call the the general

inverting circuit uh where this was called Z2, what goes from the output to the input. And this was called Z1. And

we saw that V out over Vin if the gain of the opam is high is approximately equal to minus Z2 over

Z1. So we just have to find the impedance of a resistor in parallel with a capacitor.

And that's just this R2 over R2 C1 S + 1 and then divided by Z1 which is R1. And this gives us minus

uh R2 over R1 * R2 C1S + 1.

So that is the transfer function of the new circuit. It doesn't quite look like a an integrator

but not all hope is lost. If you look at it carefully, we can identify a special case and the special

case is as follows. If R2 C1S is much greater than one

then we have this R2 cancel this R2 and we end up with minus1 / R1 C1S just like before.

So for this circuit to be a good integrator we would like that to happen. So to be

to be a good integrator, uh the circuit requires

that R2C1 S be much greater than one. Now the problem is that s generally is a complex

number. So I cannot say a complex number is much greater than one. So what we do is we say the magnitude of r2 c1s is

much greater than one. All right. So what does this mean? Well this means that of course we have r2 and

c1 under our control but it's really s that plays a role here. S is the frequency of the input. So if I apply

like a sinosoid at the input then the frequency would be J omega and that's what's going through. So in other words

this circuit is a good integrator so long as the frequency of the input omega time C1 * R2 is much greater than

one. So for frequencies that are sufficiently large the circuit is a good integrator

because it satisfies this condition. But if the frequencies are very low is not a good integrator.

So for sufficiently sufficiently

high frequencies. It's a good

integrator. Okay. So, omega the frequency of the incoming signal has to be large enough

so that this condition holds. Actually, intuitively we can see why the circuit is not a good integrator if the

input frequency is very low. Let's say the input frequency is very very low. Then what happens? Well, if the input

signals, if the input frequency is very very low, this capacitor is an open circuit. We know that at very low

frequencies, the capacitor has a very high impedance. It's like an open circuit. If that's an open circuit, what

do we have from here to here? We just have an inverting amplifier. We don't have an integrator anymore, right? We

have an inverting amplifier. We don't have a an integrator anymore. And that's why the frequency has to be high enough

so that this capacitor dominates this impedance. Meaning that this impedance is approximately

equal to the impedance of the capacitor and that means that the impedance of capacitor must be much less than R2 and

if that's the case this is the condition and then we have a good integrator. So this fix that we apply to avoid this

uh saturation problem does limit the frequencies that the input can have while we are performing

good integration. But that's the price that we pay. We can pick R2 to be larger and larger for this to be satisfied. But

if you pick R2 to be larger and larger then the offset is also amplified by a larger and larger amount. So we have to

balance these things. All right. So that is the integrator and the way we fix the problem of the

offset. Let's go to another interesting imperfection in op amps which we call

input bias currents.

uh this happens in bipolar opamps because if you remember bipolar transistors have a finite base current

because the beta is not infinity. So we have a collector current divided by beta we have a certain base current and uh uh

the inputs of the op amp if they are connected to bipolar transistors will have a certain amount of current in here

and here which is drawn by the circuitry inside. If you remember when we looked at the 741 briefly, we had something

like this. We had a transistor like this which was which looked like an emitter follower and then something like this

which looked like a common base stage and similarly on the other side. So those are the circuits that we had

before and what we expect is that there is a base current drawn by this device and drawn by this device. So these are

the currents that are drawn here. Okay. So if you buy a bipolar op amp like the 741 then we do need to remember

that the inputs need some sort of bias current. That biurren has to come from somewhere right? This guy needs a bias

current has to come from somewhere. If it's an open circuit the bias current is not there. The device is not biased.

Everything is dead. You don't have an op amp. Okay. So first how do we model these

bias currents? Well u it's very simple assuming that these currents are constant we just

model them by constant current sources. So we attach a constant current source from here to ground call it IB1 for

example and another one from here to ground call it IB2 and these are the two inputs of the op

amp. In other words, the opamp consists of the sort of the ideal opamp or the opam that we have studied before and two

additional current sources that model these currents. Uh to find the value of these currents, we go to the data sheet

of 741 and see how much they are. I don't remember maybe a micro amp or 0.1 micro amp or something in that range. So

those are the currents that we have here. All right. Now uh it could be that in

some cases these currents actually give us certain errors in our circuit design uh just like the DC offset cause

problems in previous stages. So let's look at a couple of cases and see what what's the consequence of having these

currents. By the way, if you have a cos op amp, then these currents are extremely small and usually not

troublesome. But for bipolar opamps, they are more pronounced. All right. So let's go and look at the

effect of these bias currents on uh let's see what did I do here on the uh

uh on the non-inverting amplifier. So we draw a non-inverting amplifier like this.

R2 R1 plus minus.

Okay, so we have V in here and V out here. And let's say V in is an ideal voltage

source for now. So that's an ideal voltage source coming to the non-inverting input. And now we

have to add these two currents. So we add a current source here IB1 and another current source here IB2

and we are wondering what kind of error we will get at this output as a result of IB1 and IB2.

All right. Well, sir first IB1 IB1 flows entirely through this voltage source and this voltage is undisturbed because this

voltage is given by this voltage source. The voltage source an ideal voltage source imposes a voltage regardless of

what's going on. So IB1 has no role in this voltage. We don't see its effect anywhere. Now whether that's a good

thing or bad thing, we don't know. But that's what happens. All right. So let's focus on IB2.

IB2 needs to flow from this node. So it has to come from somewhere. Let's find the candidates for that. And to analyze

this effect, I will assume that Vin is zero. Again, I'm using superposition. So let's say Vin

is zero, meaning that we just short this to ground. And now we're looking for the effect of IB2 at the output.

Okay. Well, there are three wires connected to this node. one is the input of the op amp which presumably doesn't

draw any more current because we already included that current source here. So there's no more current here. Okay, so

nothing there. So there are only two possibilities. Some current through R1, some current through R2 to add up to

give us IB2. Okay, but again remember if the opam has a high gain

and this voltage is zero then this voltage is also close to zero going back to the fundamental property.

[snorts] Okay. So if this voltage close to zero it means that R1 has zero on this side and approximately zero on this

side. So the current through R1 is also zero. So this current is approximately equal to zero.

That means that there's only one path for IB2 to flow from and that's just R2. So IB2

uh for the most part has to flow through R2 like so. Okay, that generates a voltage of IB2 *

R2 from here to here. And this voltage is close to zero. So V out which is this voltage plus this

voltage will be approximately equal to IB2 * R2. So V out is equal to IB2

* R2 approximately since the voltage across R1 is very small because this voltage is equal to

approximately equal to this voltage which we set to zero. All right. So that's the amount of error

we get at the output. The output voltage has a DC in it. And that DC is equal to this bias current of the op amp

multiplied by the feedback resistor R2. The other resistor doesn't play much role in this uh behavior.

All right. Now it turns out that there's a quick fix for this so that this error is removed.

So what I'm thinking is this uh I have a certain amount of voltage here I2 * R2.

So what if I try to come from outside and add a little voltage source here.

I know that this voltage source will be amplified by some factor comes out. And if I pick the polarities right, maybe

this voltage source after amplification is exactly minus this. So they cancel each other and the output is zero.

So what I'm thinking is I can place a voltage source here. But now what do I do? I can't really buy

a battery and put it there. So I have to figure out how I can create such a voltage. And there's a very simple way.

So let me show you how that is done. So, let's go ahead and do this. We uh redraw the circuit. And this time, this

is what we do. We still have all of that stuff. R1, R2,

positive, negative, V out. I'm trying to generate a voltage in series with this input so as to cancel

the output so as to null the output. Okay. So what I will do is I place two resistors here in parallel in series

with the input and I pick one to be R1 the other to be R2 and this would be the main input

and I claim that in the presence of IB1 and IB2 the output now is clean. it has no DC

assuming that of course IB1 and IB2 are equal which is a reasonable approximation.

So let's draw IB1 and IB2 and look at their effect and see what happens. So IB1 flow flows from one input of the

opamp to ground. I have to draw it way over here. That was the model that we developed.

And then IB2 IB2 from the other input. So that's IB2 and uh to see if the output has any DC

or not we'll use superposition meaning we set the input to zero. So the input is zero

and we are curious to see if V out is clean. Okay. Well how much is the voltage at

this node? That voltage just I1 times the parallel combination of these

resistors and it's negative because this side is zero. This side is some voltage right

going the current is flowing this way. So the voltage at this node is equal to I

1 * R1 in parallel with R2 and then a negative sign because the current is flowing this way.

That's the voltage that we have here. How much output voltage do I get as a result of this voltage? I can use

superposition again meaning that I don't have to worry about this guy and I measure the output voltage just

resulting from IB1. Now from here to the output I have a non-inverting amplifier right that's a

non-inverting amplifier so the voltage I have produced here is multiplied by 1 + R2 / R1

so I can say that V out is equal to the input voltage minus I1 R1 in

parallel with R2 minus I1 R1 in parallel with R2 2

times the gain of the amplifier from here to here which is 1 + R2 / R1. This is the amount of voltage that we

generate at the output of the amplifier only due to IB1 flowing through the parallel combination of R1 and R2.

Now let's remember that IB2 has its own effect again using superposition and the effect of IB2 at the output is the same

as before. It's this much because uh with IB1 set to zero having these resistors here doesn't change the

gain of the circuit doesn't change anything as far as IB2 is concerned. So if we use superposition for IB1 we get

this. If we use superposition for IB2, we get this. And we have to add these algebraically.

So we have plus IB2 R2. This is the total output voltage of the

circuit when we include both IB1 and IB2. Is this zero?

Yes. So what you need to do is this is R1 R2 over R1 + R2. And this is R1 plus R2 over R1. So these cancel and minus

IB1, IB1 and IB2 are the same. So we end up with zero. So that's great. That's a very nice and

simple fix that we use in conjunction with bipolar opamps because we are worried about the effect of these

current source, these bias currents. All right. Uh let's add a page. And let's look at the effect of uh these

things on the uh uh behavior of the integrator as well. So let's consider the effect of these

bias currents uh input bias currents on the integrator. So

input bias currents

in integrator. So we're wondering what they do here.

Okay. So no problem. We'll draw the circuit like this. That's our integrator.

We have a feedback capacitor C1. We have the out. Then uh we have a bias current from here

to ground which we call IB1. Another bias current from here to ground which we call IB2.

And uh this is connected to ground. This is connected to the input. And we are wondering if uh these bias currents

cause any problems in this integrator design. Okay. Well,

uh this point is fine because IB2 just has to flow from ground. Nothing here. This voltage is zero. But this voltage

probably does something. Again, to study the effect of IB1, let's use superposition and set VN to zero. So we

set V in to zero. And we have to trace IB1 through the circuit and see what it does.

If the G of the opam is high, this is a virtual ground. So this voltage is close to zero. If this voltage is close to

zero, this current is close to zero. So IB1 cannot flow through R1. It has to flow through C1.

All right? So this is what we have. IB1 is flowing through C1. C1 is integrating that current because

we know that the voltage across the capacitor is the integral of the current through the capacitor. So C1 continues

to integrate this current. This side is zero and this side keeps going up. So V out keeps going up. Very similar to the

effect of the DC offsets that we saw before. So what we see here is that V out also

grows with time like this. And uh we can express it as

1 / C1 times this current time T.

So that's the equation for that waveform. And we'll go up until the FM saturates and then we're stuck.

Okay. All right. So the integrator fails for two reasons. One is integration of its

DC offset voltage and the other is the integration of its bias current input bias current.

Okay. So how do we alleviate this situation? Well, a partial remedy is this. uh

partial remedy is to try to uh of course if that we add that resistor there uh that resistor looks like this

remember that resistor that we put here uh that's really the only reliable solution

uh that ensures that the circuit does not uh saturate it it forces any currents that we need to draw from here

to flow from R2 not from C1 one. Uh but we can also try to add a resistor here equal to R1

so that IB2 flows through this R1 and generates a voltage and the hope is that this voltage and the the voltage of

these two cancel each other because I can replace this by the as well. So if I replace them by thean this is what I

get. I get R1 IB1 R1 that's for these two and then this goes

to the input of the opamp and then here I also have same thing I have IB2 * R1

IB2 * R1 but with a negative sign And uh actually this also negative and then we have something like this.

So what we are thinking is that because these two voltages are equal uh the integrator doesn't see any

difference so it doesn't integrate. Uh so yes we could try to do that and usually we do that with bipolar opamps

but keep in mind that if there's a slight difference between IB1 and IB2 we still

integrate. So the only reliable solution is to use this resistor. But to alleviate the effects of the input bias

currents, we also practice this method of inserting a resistor in series with a non-inverting input of the op amp before

we connect it to ground. Very well. Let's talk about the speed limitations

of opamps as the last type of imperfection in opamps. So, we'll look at speed

limitations. Well, remember that when we looked at the 741 specifications, we saw that the

bandwidth of the op amp when you buy it is the 3dB bandwidth is something like 1.5 MHz, 2 MHz, something in that range.

So, but it gain is very high. has a gain of let's say 100,000. So the question is what type of speeds

what type of frequencies can I run this circuit at uh before it becomes useless.

So to see that better let's go back to the 741 example and try to roughly plot its frequency

response just the op amp by itself. So here's the op amp and here's the 741

and for example we have grounded the inverting input apply something here measure something here and plot this

frequency response so if you want to call this frequency response H the magnitude of age is like this at very

low frequencies we have a huge gain 100,000 right so this gain here is 100,000

And this gain as a function of frequency holds up up to about 1.5 MHz maybe 2 MHz. So goes up like this. And the 3dB

bandwidth is about let's say 2 MHz and then past that point it starts falling.

Okay. All right. So this is the general behavior of the op amp. And we might try to approximate this by a first order

system just like a simple RC. Uh we will call this u f0.

This is the 3dB bandwidth of the op amp. And uh if you want to make a first order system from it, we will write it like

this. We'll say h of s for this opam from here to here is equal to a 0 over 1 + s over omega 0. Omega 0

is just 2 pi f0. We need that because s itself has 2 pi. And then a 0 is this factor of 100,000.

This makes sense, right? If s the frequency of operation is very low we have a gain of a zero and then as this

goes up you remember that we take the magnitude of this from like bodhi plots and we see that it falls.

Okay. So if we can model the op amp by a first order system like this meaning this box is actually like this not just

a z then we have to go back to every circuit that we studied before and wherever we see a z we have to replace

it by a 0 1 / 1 + s over omega 0 and let's see what happens. We had the non-inverting amplifier, the inverting

amplifier, the buffer, the integrator, differentiator, all of those things. Right? So for all of those, we have to

go back and re-examine the results knowing that omega 0 is not infinity. This eventually rolls off.

Okay. So just as an example, let's go ahead and repeat the analysis of the non-inverting amplifier with this type

of model for the op amp. All right. So here's the non-inverting amplifier R2, R1,

V in, and V out. So not only are we not assuming that A0

is fin is infinite, so a Z is not infinite, it's small, moderate, we are also assuming that there's a frequency

dependence. So what goes in here is this uh transfer function. Okay. So now we need to do the calculations. Now it's

not that hard actually. What we do is we look back to the equation we had before and simply replace a 0 with a 0 / 1 + s

over omega 0. So this is what we get. V out over V in

of S that's the transfer function from here to here is equal to A 0 over 1 + S / omega 0.

And then we have uh 1 + a 0 over 1 + s / omega 0 r2

over r1 + r2. So that's what we get when we uh go back to our equations and make that

replacement. All right. So uh this equation is uh interesting and we can manipulate it a

little to make it uh somewhat more intuitive. Uh let me just check something here. If

uh this goes to infinity we have r1 + r2 / r2. So that's r1 over r2. So actually this should be r1 here not r2.

Okay. All right. So let's play with this a little. I will write it like this. I will say v out over v in of s is equal

to uh let's go ahead and multiply by 1 + s over omega 0 both the numerator and the denominator. So we have a 0 then we

have s over omega 0 + 1 plus a 0 r1 over r1 + r2. So that's the transfer function of the

overall amplifier the closed loop gain or transfer function of the circuit. Okay. So uh let's compare what we got

for this overall amplifier with what we had for the op amp itself in terms of frequency response.

So let me change the color of my pen and we'll see what we get. All right. So for the opam itself with

one pole we saw that uh the 3dB bandwidth is given by the pole frequency omega 0 and to find the pole frequency

we set the denominator to zero right and that gives us s= minus omega 0 and that's how we find the 3dB bandwidth it

comes here starts rolling off okay now let's go back to that circuit and first assume the frequency is very

and see how much gain we get at low frequencies. Here we had 100,000 a z here if s is very small we get this. So

let's just write it out. So this is what we have. The gain is lower. The gain is now a 0 over 1 + a 0 r1 over r1 + r2.

So that's the gain that we have. Obviously the gain is is smaller. Uh I building an amplifier with a moderate

gain gain of 10 or 20 or something not a gain of 100,000. So obviously the gain of this closed loop circuit at low

frequencies is quite lower than the gain of the op amp the open loop gain of the op amp itself.

All right. Now where is this rolloff point? Where does this begin to roll off? That's a very important result.

Well, to do that, to find this rolloff point, I have to find the uh 3dB bandwidth of the circuit, the pole

frequency of the circuit. This circuit still has a single pole because this s has a power of one. And to find the

pole, we set the denominator to zero. So we see that the pole frequency of the closed loop amplifier including

everything is this whole thing time omega 0 with a negative sign. So it's 1 + a 0 r1 / r1 + r2

* omega 0. So now we see an interesting difference between the op amp itself which we call

the openloop circuit and this closed loop amplifier. We see that the pole frequency the 3dB bandwidth has changed.

It used to be f0 or omega 0. There's a factor of 2 pi difference and now it's not it's uh that factor that multiplied

by a pretty large number. Right? So the bandwidth of the circuit has been extended to not just omega 0 or

not just f0 but with this factor multiplied by it. So now it's way out here. And this value is given by all of

that. So it's 1 + a 0 r1 over r1 + r2 times f0. I use f0 instead of omega 0

because this is the faxis. So this comes all the way here before it starts rolling off. And in fact, what

happens that these both meet farther up and they go down together. [clears throat] Sorry, they actually

meet right here and go down together. So I have to clean this up a little to make sure that you have a correct plot.

So for this guy, we have something like this. And then for this guy we have something like this.

So the beautiful result that comes out of this analysis the following. We reduced the gain

of the circuit from 100,000 to 1 + R2 R1. We started with 100,000 and we got only this much after we applied these

resistors and so forth. But the gain went down and the bandwidth increased. The bandwidth used to be f0.

Now it's f0 times the same factor. So the same factor by which the gain is reduced

also increases the bandwidth. In other words, we are trading the gain for the bandwidth. We reduce the gain from

100,000 to let's say 10. And at the same time, we increase the bandwidth from let's say 2 meghertz by a huge amount.

All right. So that's the beauty of this type of circuit. You can trade gain and speed uh for for different amounts that

you can see here. I should give you a cautionary note though. Uh let's say I reduce the gain

from a 0 100,000 to something like for the closed loop let's say 10. So the gain has come down

by a factor of 10,000. Right? Does it mean that the bandwidth goes from 2 megahertz up by a factor of

10,000? No, that is not true. Because what happens is that uh this rolloff eventually comes down to some finite

amount maybe 10 mehz or something. So you cannot go past that regardless of what we do. Uh but generally so long as

we're not too aggressive in this type of trading between the bandwidth and the gain, we can increase the bandwidth to

some extent. All right. So that's one speed limitation that we saw here. And uh uh

when you learn feedback uh negative feedback for example in electronic circuits too then these things come into

play more clearly and more effectively. Uh the last effect that I want to show you as far as opamp imperfections are

concerned is what we call slooh rate and that's also related to speed. So let's talk about slooh rate and see what that

means. So slooh rate

well if you take an opamp like the 741 and you build some sort of circuit an amplifier

and then you apply some inputs you see something interesting happen. So here's how it goes. Let's take a very simple

amplifier like this, V in V out and we come along apply step here. Very

simple, right? You apply step here, you should see a step here amplified by some factor.

Okay, so in the ideal case, this is what we should see. If the opam were ideal, you apply a step

here, you get a step here. If the opam is not ideal, it has some sort of bandwidth limitation. Then we apply a

step here, we get an exponential here, just like any other first order system like a simple RC filter, right? All

right. So assume that this op amp has a one pole bandwidth limitation but no other imperfection.

All right. So in that case, this is what we should see. I will plot the input

and then the output as a function of time. So I apply a step. I see an exponential.

Okay. Amplified with respect to the input. Then I keep increasing the height of the

step. And what I'm hoping, let's change the color of the pen here. If I increase the height of the step,

what should this exponential do? Well, it should go like this, right? So what's interesting is if the

opam has bandwidth limitation according to first first order system but doesn't have any

other imperfection then as the step height increases at the input

this output has a slope that also increases. You see the slope and now the slope.

All right so if I increase this farther then this also goes like this. Okay. But if we perform this experiment

on a real op amp, we see that it's not quite like that. Something strange happens. So let me draw these waveforms

again. This time with a real op amp which is uh not just limited by this type of one pole response but by some

other mechanism as well. So let's change the color of our pin and see what we can do here. Okay. So we have V in

a step and then V out an exponential. So if V in is a small

step no problem similar to be before we have an exponential and now we come along and increase the

step height like before. So we give it another new step and we see that it did this

and now we keep increasing the step height at the input. So we go to a higher step size and what we see is that

beyond a certain point as the input step height increases this slope doesn't increase anymore. It

actually looks like a straight line and then it settles like that. So if I give it even a higher step, it

just goes like this and then settles like that. So this slope fails to scale like

before. You see here with only bandwidth limitation and nothing else the exponential would have a higher slope

depending on the height of the step at the input. But in this case initially yes but then at some point this slope

remains constant. It is as if a constant current is charging a constant capacitance. Right?

We know that in that case we get a ramp. So it looks like a ramp for a while before it becomes more or less like an

exponential. So this slope which we eventually reach and we cannot surpass is called

the slooh rate of the op amp. Slooh rate of the op amp. And this effect is called

sloowing. Meaning that the op amp cannot go faster than this. It has to go on this

tangential uh line if you will. All right. So in this regime right here,

the opam actually looks like this. We have an opamp in here and there is a current source charging capacitance.

So from here to here in this case or from here to here in this case we have this type of model inside the opamp

something is going on like that and uh it looks like a constant current charging a capacitor and that gives us

gives rise to a ramp. So for every opamp that we buy we have a certain slooh rate and for for the 741 I

don't remember it's like one volt per microscond or something meaning that this change cannot be faster than one

volt per microscond and uh for different opamps we get different types of slooh rates and this

is an important concept because first of all you can see that it limits the speed right we were expecting that this would

go like that you see it would go like that keep going keep going faster and faster but it doesn't at some point it

cannot go faster. So it limits the speed of the op amp and it has other interesting repercussions. Uh for

example if the op amp is to produce a sinosoid at its output a larger sinosoid a high amplitude

sinosoid then something happens. So ideally the opam must generate a nice sinosoid here

and let's say this is a large swing you know in the case of 741 this might be plus - 5 volts or something like that

right okay what happens is that in the presence of the l rate uh we no longer have a sinosoid so right around here uh

we are asking the we are asking the output of the op amp to change quickly. So we're asking to ch the output of

opamp to change quickly across a large value and the opam says I cannot I have only this much sl rate. So what happens

around here is that the output of the opam goes like this because it cannot keep up with the speed

that we want. Similarly around here we say you have to go this fast. The opam says I cannot do that. I have only this

much current charging that much capacitance. So it has to go more slowly like so. Well, sorry actually this is

this is the wrong waveform. Let me correct it here. So uh we have the original waveform like

so and uh the new waveform will be like this. So it says I cannot keep up with

this. I have to go more slowly and it goes like that. So what you see is that the output

sinosoid is distorted because it was supposed to go sinosoidally here but instead it decided to go as a ramp and

that's a distortion that can be quite objectionable depending on what we're trying to do.

So this lure rate is another important effect in opamps that we must always keep in mind when we are dealing with

various speeds etc. All right, this concludes this lecture and this lecture concludes this series.

Thank you for joining me for 45 lectures. Look for other other series that I will create in the future

including problem solving strategies for electronic circuits one also electronic circuits 2 and problem solving

strategies for electronic circuits 2 and other types of subjects that will come up in the future.

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