Comprehensive Guide to Computer Architecture and RISC-V Overview

So very good evening guys. I'm audible to you. So very good evening. I think I'm visible. Is my voice is clear for

you? Can anyone response in chat box? So very good evening to all. Thank you for joining second day of our master

class on advanced reac and verification. So very good evening to all. Good evening. Um subulakmi. So chri good

evening. Check the audio. So let me check the audio.

So now it's my now it's clear I'm audible to you is my eyes is clear okay thank you thank you

for your response like Satya Abishek so thank you for your response so today we are going to see uh computer

architecture so what is the purpose of computer architecture so let's see in this session

so thank you for joining so thank you for your uh your interest on my master class.

So very good evening to all. It's clear clear. Thank you. This is Anamal. So good evening Anamalai.

So thank you for your interest. So why? Because of I'm thanking you means most of people are not interested to learn

the VSI. So you guys are interested. It is very special to me. Thank you for your

response. So okay. So I think we will start now. So yesterday we seen some uh content

about chip making. So how the chips are made, what is actually inside the chip. So we'll see we will see some recap. So

recap means I will I will ask some questions. You can response in chat box. So my my first question is what is

actually inside the chip? Okay. Uh can anyone response your answers in chat box? So what is actually

inside the chip? So Vless engineers are building something. So what is that particular

thing? So I want to name that uh device. So what is actually inside our chip? So you can response in chat box. Yeah. I

got some response from your side. Jas telling correct transistors a correct answer.

So correct transistors. So as a various engineers we are building the a number of transistor in single chip. Okay. So

let me show you something about chip related things. So this is a chip looks like. So after the manufacturing the

chip layout like this only. So you can see here something catchy cartex a 9 CPU cores video processing

video decoder processing and then signal image signal processor audio processor dual z sorry dual display HDMI nan flash

memory IO graphics processors so this is a kind of SOC so already yesterday I said no so we having the variety of

chips like SOC chip microcontroller micro processor, ASIC chips, FJ chips where we having the variety of chips. So

the is a kind of SOC system on chip. So this is a chip we having in our mobile phones. Okay. Our mobile phones is based

on this chip uh chip kind of like chip like a SoC only. So inside the chip we having the all the components like a

CPU. So this is these are the CPU coursees. ARM cartex. So ARM cartex is like architecture. So I'm contact CPU

cores and then GPU cores, graphics processor, GPU cores and then catch catches kind of memory and then uh A7

CPU coursees additional processor CPU coursees and then we having a lot of various like we having lot of components

like a USB interface, HDMI interface, nan flash memory, dual display, audio processor, image signal processing. So

these all things are built by the wheels engineer as a physical chip. So today we are going to see the computer

architecture. So we already having the chip. Okay, it is a physical hardware thing. So we need to control that. So if

you are using the computer means we what is the main usage of computer means we are controlling the transistor. So this

is a main thing of uh computer working. So we are just we are just controlling the hardware by using something called

my computer architecture. So we having some layers. So hardware is a base layer and then in the in the middle of we

having OS kind of thing like it's like a computer architecture itself and then we having a software like application. So

that particular application by by using that we can control the hardware. For example, if you you having

the mobile phones, okay, everyone having the mobile phones. If you want to open the camera, so if

you want to open the camera means you just have to click the camera app application logo kind of thing and then

it will automatically open the hardware. So it will automatically open the hardware, it will use the hardware, it

will capture the it will take the input from the camera and then it will display the output by using the display monitor.

So actually by it will it will flow from software it will flow it will start from software part and then it will end from

hardware part and then it will take the results from the hardware and then it will given to the software. So it's like

a flow kind of software to hardware. So in between that there is a one uh thing that is a computer architecture. Okay.

Our OS our Android are based are are runs based on the computer architecture only. So today we will we will see only

brief thing about computer architecture. We we can't see the elaborate things about computer architecture. Why?

Because means it will take more time to see the all the uh all the information about computer architecture. Okay.

Clear? Now before that uh I want to share something about uh internship program. So I I'm so

happy a lot of people are purchased our internship program. So I will say some names uh of who have who buy that

internship program. So namely suba savan uh akam. So there are a lot of peoples there like jadu. So some of them north

side. So I'm so happy from your response you are uh purchasing our internship program. So thank you for that. So let's

see this. Let's get into session. Okay. Good evening. Combinational and sequential circuit designed by

transistor. Yeah, correct answer. So, Naran Morti you are telling the accurate answer. So, we are building transistor.

They will do performance based on the circuit circuit like conventional circuit and then sequence circuit. Okay.

So, speak louder just a minute. So, I think it's uh now clear. So, let's get into session. So before that I have

one question. This is a question without this device you your computer can never boot. You can guess which on which one

one is it. So it is like there is one device that device must be on then only your computer will boot without but that

particular device your computer won't boot won't execute won't work. So I want to know what is the particular device

name. So this is comes under the electronic device only. Electronical device only.

So okay. So I want to answer some so I want some guesses from your side. So what is that particular device? It must

be on then only you can uh you will boot your OS. You will boot your computers bio. So bio bios bio is on one kind of

bootloader only. If you want to uh if you want to activate the bootloadader, you want one electric pulse or one

electric device, that device must be on. Then only you can OS. So OS also if you want to boot your

OS means you need some uh input from electronic device. I want the name of particular electronic device. So without

this device, your computer can never boot. Can you guess which one it is? processor, CPU, hard disk. So there

there are it's correct only but all the like a CPU, OS, RAM. If you want to functional all these things, you need

one electric one one one input from device. So I want to name you can guess anything. So it's BS

around. So that that is a main thing. So we are using the highspeed uh chips. We are using high speeded computing

operations. We are achieving that only. So we are using the chips at a very high speed. So that speed also based on that

particular device itself. So for speed for speed execution for insection passing all the like whatever you are

using computer means without that device computer will never work. So bootloadader is correct but that

particular boot loader needs some input from that uh like a one cos clock. Yeah I think chow3 telling correctly cos

clock. So not a cos clock we need clock pulses. Okay based on the clock pulses only our computer will boot it will

work. It will boot our OS like you're telling like a bio boss bootloader it will boot our OS based on the clock

pulses. So clock pulses who will give the clock pulses. So clock pulses will given by the crystal. So crystal is a

main device that device will give the clock pulses. Okay. Based on the clock pulses only it will it will our

bootloadader our OS will boot and then it will boot our OS. We will we can use the Windows or any OS. So crystal is a

correct answer. So crystal. So crystal is a main things. It is important one device for all electronic devices.

Without crystal uh you can't do anything. Why? Because of with in the in the crystal we are getting the clock

pulses. So we are doing some instruction. Uh if you are doing the addition operation in the computer means

for that reason for that purpose also we need crystals means we need crack we need clock pulses. So each and every

clock pulse is very important. Based on the clock pulses only they will the computer will execute the instructions.

they will process some uh things whatever we are given to the computers. Okay. Crystal oscillator. Yeah, VK is

telling correctly crystal crystal oscillator is a very correct answer. So I think it's clear for you crystal is

very importance. So you can also notice that if you are buying the new mobile phones they are telling 4.3 GHz clock

speed. So means they are that particular device are running with 4.3 GHz of CLA. Okay. So I'm coming I'm I will come

later about the clock related things. It's a very huge topic. It is it is also important topic. Okay. Of engineer. If

you are a engineers you must you must know what is a clock pulses what is a ne passage and what is one clock cycle kind

of things. You must know that. So I will tell you in upcoming upcoming sessions. So okay. So sir what is mean by crystal

oscillator? So it is on device it will give the clock pulses. So clock frequencies telling like a 50 MHz 60

megs of clock that all things are given by the crystal device. It is one device. Okay. So let's get into session uh

computer architecture. So this is our topic. So this is a simple thing like a CPU. So functionalities of computer

arches. We know that we having the CPU. Inside the CPU are we having the control unit, arithmetic logic unit, memory unit

and then input and output devices. For example, if you take an example as your system, it it having CPUs and then input

devices called mouse, keyboard, output devices are monitor like a printer any kind of things. So it having some input

devices and output devices but in between it having some uh blocks like a control unit, arithmetic logic unit,

memory unit. So what they are? So what is the purpose of these units? So we'll see one by one is the purpose of this uh

units in CPU. Okay, this is very important thing and then we will move into riskfy architecture. So it's not

like a control unit. So control not like a simple thing. It will it will follow some architecture kind of form

architecture risk architecture x86 from Intel. So there is a lot of architecture is in market. So each and every

processor CPU cores are built based on the computer architectures as a as you are a engineer you are making chip and

then you are making some CPU coursees. So by if you are if you are making the CPU course means you must aware of the

computer architecture. So based on the computer architecture only you can make the CPU core uh inside your chip. Okay.

So let me I will tell you one by one. So what are the usage? So uh what is the functionalities of CPUs one by one.

Okay. Till now do you guys any doubt you can ask now. So till now do guys do you guys any you

can ask in chat box. So we are we seen like a front end back end of chipm and then today we seen like a basic thing of

basic thing of crystal clock pulses. So I think a RAM processor. So I think we'll move to the

next. So just a minute. So this is a we'll see the fundamentals of computer architecture only today.

Okay. And then we will see some overview of RXFI architecture. In the end of the session, we'll see

some uh overview of RXFi riskfi architectural. Okay. So, and then uh first of all, what is computer

architecture? I already said know it will do some uh control, it will do some control operation, arithmetic operation,

memory operation. So, this is a basic things of computer architecture. Okay. Computer architecture dedicates uh every

aspect of computer function functioning. So functioning means uh it will get the input from user and it will do something

based on our instruction. It will do it will do it will execute it will do something based on our instruction and

then it will give output. So this is working of uh computer. We are the CPU core will get the input from uh user.

User given user are mostly given like instructions only. User are giving only instructions. CPU will receiving the

instruction and then it will do the uh expect you things regarding the instruction and then it will give the

output uh to user by using the monitor or any other peripheral devices or any other interfaces. So this is a b this is

a basic thing CPU having transistor user just controlling the transistor not directly so you can't directly control

the transistor so you you have to use some medium that medium is called computer architecture okay so user can

give the instruction to CPU CPU will receive the instruction they will perform some uh instruction operations

and then they will they will get the they will make the results and then the CPU will give the output to user Okay,

this is the functionalities of CPU. So let's check uh let's see uh what are the components of CPU. Central processing

units, memory unit and then input and output devices and then buses. So here we already know that what is memory. So

memory means CPU is there. So if you given like in you want to give the instruction to CPU, you can't directly

give the instruction to CPU. Why? Because of you have to store one place. If you I have one I have four

instructions. So if you I want to execute all four instruction. Okay. But you can't directly execute. So you can't

directly given to CPU. You must have to store one place some memory. It's called register or we can say okay memory or

instruction register instruction memory from that memory CPU take the instruction and then it will execute and

execute means it will do the arithmetic logic operations and then it will give the output to user and then CP also

can't give the output directly to user so CPU will store the result one kind of in memory from that memory user can get

the data So memory is the main thing. So you can't directly you can't directly like a uh CPU

by using the CPU CPU can't get the dire get the data from user directly. The CPU will get the data from memory and then

uh it will do computing operation and then it will store the output one from 2D1 memory and then from the memory

itself we can get the datas we can get the results. So these are basic working of CPU. Okay. So and then these are the

main uh components arithmetic logic unit control unit registers. So let's see one by one. So arithmetic logic units it

will do the perform operations. Perform operation is nothing but additional addition multiplication subtraction and

operation or operation not operation X or operation. These all things comes under the AL arithmetic logic unit.

Okay. So I have some query here. It's like a transistor

requires transmitting data one bus two bus three but etc in a bus. So it's bus means I will tell you one by one what is

a bus. Okay I will tell you one by one what is a bus don't confusing. So and then coming to the control unit. So

control unit means it will control the instruction and datas. So CPU will do the the CPU inside the CPU having the AL

block. AL block will do only the addition some arithmetic operation only. So who will give the instruction for AL

that the uh on that time the control unit will take the responsibilities. So it will control the all the instructions

and uh datas. So if you want to do the addition operation means that additional keyword that additional instruction

which is given to uh arithmetic logic unit okay that is given by the control unit only and then registers. So the

register means it will it will store the data temporarily temporary storage it we can store the current data and then we

can access it will mostly useful for fastest access why because of CPU doing lot of operations lot of instructions it

will continuously fetching the data from memory it will do operation and then it will store from the it will store to the

memory so this is a basic work of uh basic work of basic work of CPU it will uh the control unit will give will give

the instruction to arithmetic logic unit. The arithmetic logic unit will do operations like uh based on our

instruction it will it will do operations. It may be addition, it may be as operation, it may be under

operation, it may be ex operation. After that after the execution it will give it it will give the data and then the data

is stored in register only. Okay. From the register only we can get the data. So this is a basic uh things register

control unit and arithmetic logic unit. Okay. And then uh we'll move to the memory

system. So we are we having a lot of memories. We having a lot of memories like RAM memory, ROM memory, flash

memory uh and then uh EP room memory, EP room. So we having a lot of memories. But we can divide into two types. One is

volatile, another one is a nonvatile. So volatile is kind of temporary memory. Okay. Like for example RAM. So RAM is

comes under the volatile memory. You can see now you can see here also RAM is a kind of volatile memory. It means it is

a temporary memory. It can store the data temporarily itself. It can store the data only temporarily. It can't

store temp permanent. So if you want to store the permanent data means you have to use nonvital memory. Nonvital memory

is nothing but ROM read only memory. And then these are the primary memories for uh computer architecture. Secondary

memory is our SSD uh HDD and then optical disk. So these are our internal storage. This is our main storage like

not like a main storage. It's like a secondary memory. So we can store the datas. We can you can we can use the

datas based on our instruction only. So this is there are two memory systems primary and memory. Primary and

secondary. Primary means uh RAM and ROM. Secondary means SSD and then disk hard disk kind of things. The RTS all comes

under the secondary memory. Why we are calling that secondary memory? Means the processor won't need the data very much

from the secondary memory. The processor will need the data from primary memory only. Why? Because of we are storing the

instruction data only in the primary memory not in secondary memory. Okay. Inside the CPU there is only there is a

memory is called only primary memory only. Our registers are comes under the primary memory itself. Okay. It's it's

kind of u uh temporary memory inside the chip. So what about the catchy memory? So

catchy memory. So if you see this uh if this is picture I will show you I will explain what is

the catch. So you can see here uh here we having the uh CPU core one contact A9 CPU core. So this is one CPU core. So

each and each and every CP core uh uses the catch memory. So there is a kind of level one catchy, level two catchy,

level three catchy. So catch memory is nothing but uh if you are using uh one address like a memory means it is fully

based on the address only. If you are using address simultaneously repeatedly. So you are using one address repeatly

that address will stored in catch memory. Why? Because of uh if you're using that address particular randomly

means repeatly means it will store in catch memory. Why? Because of the computer that architecture will defends

like that only that particular address are user are used by user mostly. So we have to we have to store that address in

the catch memory. So why? Because of why we have to store in catch memory means you can see here the catch is very near

to CPU. So by by the CPU the CPU can easily access the catch memory. Why? Because of internal storage will it is

so far to CPU. Why? Because internal storage means it will come it is outside of the chip and also RAM and ROM also it

is in another block of chip. But you can see here catchy and CPU core are are just in very close. So very just like a

very close in in the architecture in the chip architecture. So by based on the chip based on the CPU it can easily

access the catchy memory uh datas that's why uh we are using catchy inside the catchy we are storing the repeatly using

addresses okay not like uh any other datas it will store only repeatedly using addresses only okay

so and then I think it's clear Are you catchy? What about catchy memory from Satya? And then if you if you play a

game then what then the then the processor needs secondary storage. Please explain. So if you are playing

the game uh we don't need uh mostly uh the CPU won't won't u won't use the secondary memory. Why? Because of the

mostly the games are run by the GPU. GPA is GPU is process pro process of executing parallelly. Okay. CPU will

execute instruction serially one by one but GPU execute instruction parallelly. So at a time it will do a number of

taskers. So that uh GPU needs some instruction. CPU needs some instruction. That instruction are stored in

registers. So register is a primary memory. So mostly gaming are fully based on the primary memory only. Okay. that

well that that graphical files that background files are stored in secondary memory but uh by CPU will fetch will

fetch the datas from the secondary storage and then it will store the instructions in these registers. So CPU

will fetch the datas main datas from second uh from the secondary storage secondary memory and then it will uh it

will make some instruction and then that particular instruction are stored in register only. So register is a primary

memory. Okay. So for fast computing we have to use CP CPU are using only the primary memory only like a primary

memory means registers. Okay I think it's clear for you. So do catchy memory room. So no catch me

a room. So room means read only memory. You can't rewrite the you can't overrite the room. So it it's like a flash

memory. It's like it's like a flash kind of thing. It's like a memory. It will updating the addresses itself. It's like

a it's like a room only. But we can't we can override the room like a EP room. So do you know the EP room electrically

erasable program only memory it come this comes under the uh that kind of thing. So catch is one kind of memory.

It's not it's not same for Rome and RAM. It's like it's one memory catch memory. So do scatchy memory takes internal

storage? No. No. It it it is it is a separate memory. It won't take internal storage. So internal storage is nothing

but our SSD hard disk is internal storage. So in the internal storage we are storing some base files which is

useful for CPU. Okay. the CPU will get the datas instruction from the some datas from the base files in the hard

disk and then the CPU will make some instruction to do some our operations. So it's like a flow of like there is a

one huge memory here and that memory is called secondary memory and then there is another memory is called primary

memory. It's a small memory in this in the primary memory we can store only instructions only. We can't store the

datas. So you can't store the huge datas in primary memory. You can store only instructions and then functionalities of

your uh user input. Okay. Inside the catchy memory the they have data and data and buses. So

inside the catch memory. So inside the catch memory it having only the addresses addresses for insection. So in

the registers we are storing in sections. Okay. We are storing instruction and then in the catchy

memory we will we we are we are storing addresses. addresses means uh in the we are storing insection in one memory. So

it having some addresses in the catch memory we are storing the particular insection address it's it's like in the

catch memory we are storing addresses for insection. So like insection memory addresses like register addresses we are

mostly storing the admin in registers. So in the catchy memory we are we are storing the repeatedly using registers.

So inside the register memory it having the some instructions it may be and operation or operation and not operation

uh lot of things like a load and store if you read the ARM architecture or risk by architecture things you will get some

you will get some understanding about the register instructions. So there is a huge this is a very huge topic memory

memory hierarchy and then memory addressing and then instruction fetching decoding is a huge topic it will take

more time so I will uh we will take some we will take some in some other classes. So we will continue from from the memory

system. So we have completed the memory system and then we'll move into the IO devices and buses. So IO devices means

we already said no keyboard mouses are called IO devices and then buses. So coming to the point buses means just a

minute. [Music] Oh, sorry for inconvenience. I have some

battery issue. Okay. So, we seen some IO devices like IO devices means nothing but u input and output. Input and output

devices. We are mostly using input devices for comput, keyboard, mouses and the output uses, monitor, printer. And

then coming to coming to the buses. So we are using so I'm audable. Can anyone response in chat box? Is my

voice is clear? So what is difference? What is the basic difference between HDD SSD? So so the

main difference is speed. So SST is a more speed. It comes under the RAM kind of thing RAM memory. So it will it will

execute instruction. It will data transfer is very high speed. So this is a basic thing. SH difference between the

SSD and HDD SSD is a very high speed. So our laptops having SSD only.

So and then uh data buses, address buses, control buses. So here uh I will show some architecture

it having some buses like uh data bus, address bus and control bus. Mostly in data bus it will send the it will

transfer the datas from one block to another block. In address buses it will it will send the addresses like a

uh register addresses kind of thing. And then control bus means it will it will useful for insection transferring. Okay.

Uh computer having three buses data bus address bus and then control bus. Data bus is a is used for sending the

transmitting the actual data and then address bus is used for sending and transmitting the address of registers.

Okay, means uh register means uh in the register we are storing instruction. So in the address bus it will we can store

that CPU can store the address for the addresses address of that particular registers okay register memory. So and

then uh coming to control bus. So control bus is it is in the control bus CPU can store the we can transmit CPU

can transmit the uh insections okay and operation I will show the insection how they look like. So and then so we have

we in in ' 90s 60s or 70s I think. So so we are uh humans are first introduced the one human architecture. So this is

one computer architecture was firstly introduced by one human. So that in this particular architecture there is some

issues called why the main issue is insection and datas. So insection and datas are stored in single memory. So

this is main main disadvantage of the one human architecture after the long time. So we got a hardware architecture.

So hardware architecture is nothing but we are currently using some architectures like a CPU arure like

architecture risky arure x86 architecture. So this all comes under the architecture computer aresures. So

these all architectures are based on the hardware architecture only. So hardware architecture is nothing but uh in the

one in the one human architecture we are storing the address and datas in single memory. Here we are storing the datas

and instruction in separate memory. Okay. Here you can see that separate memory for data and instructions. Okay.

And then independent buses. So independent buses means address bus control bus data buses.

So and then these are the advantages like concurrent bus access reduce your corruption uh reduce your corruption

risk and then better for better performance. So and then it having some more disadvantage called like more

complex architecture high cost more uh difficult just a minute more difficult to program. So this is

some uh kind of complex architecture. So and then coming to the we are using two architectures currently one is risk and

then sysk risk means reducer instruction set computer and then sysk means complex instruction set computers okay so

there's a difference between risk and cisk so the name itself it having the complex complex means it will it will

the instructions set and then addressing addressing uh unit and then memory unit are mostly uh it's in the complex kind

of thing. Okay, it's it will do only single processing unit and then it will do only one task at a time. It will take

less memory usage and then it will do slower execution in this kind of architecture. Before making the one chip

you will in that chip following the sis kind of processor means architecture means it will very it will do all these

kind of things only single processing unit one task at a time less memory usage and then slower execution compress

instructions but if you're using the reducer reduce sorry reducer instruction set computer means we will we'll do some

we we did some optimization in arctic architecture from hardware architecture And then we got some uh this kind of

processor architecture. It will it it will uh it will do fast execution and also

uh fast execution means it will do it will following the pipelining and parallelism. So I will tell you one by

one what is pipelining and what is parallelism. So risk kind of risk kind of processor will do the larger it

having the larger registers. Okay. And the frequently used variables in processor faster operation simple

inection pipelining friendly. So we are using mostly this kind of processor only. Okay. We are using only we are

mostly using risk kind of processors. So we are following the kind of architecture only nowadays. So each and

every computer having some registers list. So I will show you one by one. So in upcoming slides.

So uh each and every so you can you can see here risk and sisk risk and sisk processor having some ISA. So ISA means

nothing but instruction set architecture. So by based on this ISA only uh CPU works how we can say means

so in your Python code or any system V code you are uh you are writing a equal to 5 + 1 so you are doing the addition

operation it having some operance operates and then we can we have to store the 5 + 1 6 in the memory of a

location. So a is a one register we have to store the 5 + 1 6 in the uh a register. So these things are controlled

by the ISA in computer architecture. It means uh insection set architecture. So let's uh it is a very big topic. So if

you are a wheels engineer, if you are embedded engineer, you must know this ISA things like each and every chips

like ARM chip, ARM based on ARM computer arure and then risk five based architecture are following or they

having some separate ISA in section list. Okay. So we'll see only uh brief intro about only. Okay. So you can see

here it determines ISA determines the software compatibility and performance. So ISA is a main thing controlling the

hardware. Okay. So and then this is a bridge between the hardware and software. I already said no ISA and

computer architecture is a bridge between the hardware and the software. So and then it having the three kinds of

ISA stock based ISA, accumulator based ISA and then register based ISA. So stack based it follows the last in first

store structure. So we are mostly using this thing like a register based. So I already said no we are storing some we

are storing the instruction sorry not we are CPU storing instruction in memory. So CPU are storing instruction somewhere

in register memory. So we are following that only. So this ISA is we are following currently. So register based

ISA multiple registers. So multiple register means it having some lack of like it it having some lot of memory

location is like a registers we can store the data we can store the instruction so and then most common

today so this is the most common today register based so and then pipelining and then

parallelism so before going to that I will show you some uh architectural so without seeing that you can't understand

so what is pipelining what is instruction so what is the pip planning and parallelism you can't understand. So

I will show you the architecture. So before that I have some query here. So we have seen register are designed

or designed using the deep fluff. Do we use the same technology in today design too? Yeah. So

correct from Neha Capil. like a couple we are uh we are uh deep fluff will do the will do the storing so

it will it will store the one bit data for one clock cycle okay deep fluff is mostly deep flip-flops are mostly used

for storage purpose so register means while writing the villa code HDL code if you want to make a memory means you you

have to use the flip-flops only okay so here I'm telling the register is same as the D flip-flop only So I'm telling like

a B high level site. So high level. So VO and design. So RTL code is it's like a low level. So it's like a hardware

level. But in our registers means is high level. So both register and DP fluff are same only. So if you if you

see the uh register in upside and the base of the register is DP fluff only. So we are going to write the RTL code or

design code for the registers. So I'm telling like this buses like I'm telling like registers and then architecture we

have to write the vlog code for this architecture. So this is a main work of this engineer. Okay I'm telling uh this

is not like architecture. So based by using this architecture we we are writing the RTL code and then we by

based on the RTL code we are converting into gates and then we are converting into transistor and we are building into

chip. So this is a flow basic flow. So both register and the tila for are same only okay so kindly share the attendance

link day one so you'll get you'll get so and then we'll move to the pipelining so I want to show something so in uh this

is a company called Saki processor so saki processor is nothing but uh in IIT so you know you guys know about iat

madras uh iat madras uh with shaki they build processor. So this is the India's first processor which is made by the

Indian own product of chip. So they are building uh some kind of SOC chip and then processor chip and then controller

chip. So I will show you something uh they are using the risk five architecture. Why? Because of ARM

architecture and x86 architecture are are if you want to use means you have to f you have to pay for that to buy the

patent. But riskfy is a open source like a Linux is a open source. We can you can you can also use the risk architecture.

You can also use risk factor ISA by based on that is you can make the chip. You can make the chip and then you can

make the you can make your own OS and then you can make you can publish kind of thing. So,

so OS for uh for OS purpose also that architecture that architecture is very important. So, if you're using risky

architecture uh you you you want to oper you want to operate the Windows 11 OS in risky means

you have to optim you you have to optimize architecture based around the Windows uh OS. So there's some things

like uh architecture architecture is a very base to boot the OS to run the OS. So we have to make the architectural

design based on that your OS only. So this is one company in Chennai Shaki processor. It is they are collaborative

with IAT they are making some processors C-class processor the controller SOC's. So I will show you the architectural. So

this is a micro architecture for the our their processor their chip. So their CPU are B are look like this only inside

the chip they are following this processor only. You can see here in section catching fetch uh PC means

program counter and then pipeline buffer and then decode and oper fetch and then execution memory accessing and then

write back unit. Okay, here you can see the data catch. So here it's like a memory only. So data catch

and the instruction catch or memory only. Here here in this catch memory we are the CPU will store the insection of

what are the insection we are performing that are stored in this instruction catch only datas are catch datas are

stored in this catch memory. So instruction means nothing but you are doing a equal to 5 + 1. So addition is

the instruction okay that that are stored in this insection catching and then datas operent means five five is

one data and then uh one is another data that are stored in data catch memory. So and then here it will it will fetch the

data. Here this is doing the fetch data. Fetch means getting the information and then here you can see the program

counter generation. Here is the need for clock. So here it will count the program. So here it will count the

instruction counts. So how many instructions are done. So this is a basic flow. So it will get it will fetch

it will fetch the instruction and then it will give to the decoder and operent fetch and then it will it will fetch the

operant from the datas and then it will give to the execution. Execution means nothing but alu arithmetic logic unit.

So and then it will send to the memory access unit. So it will it will after that it will store the data and then it

will send to the rightback unit. So right back means output unit. So, so there is a lot of operations in the

computer architecture. It will take whole day to explain. So, and then you can see here some buses called AXI

buses, you these are the peripherals like I2CPI and then PW PWM and then lot of realtime

black module. So, this is a so this is a CPU core. So, this these are the peripherals. If you want to communicate

with peripherals means you have to use buses that is a buses buses. We will see the ama protocols in the in the end of

the master class. Okay. Axi, a hap, h later things. So this is a very huge topic. It will take more time to explain

but it's it will look like this only. It will fetch the data and it will execute and it will store into memory and we can

get the data from the memory. So this is a basic flow of computer architecture. Okay.

So till now do you guys any doubt kindly ask in chat box. Sir uh I am from embedded background. We are familiar

with registers. Okay good. And then kindly share. Okay. And then we see some basic things

about computer and then I will show you another thing. So how they are execute how the instruction looks like? So

catchy. So each and every code having the L1 catchy, L2 catch, L3 catchy. So L1 means very small inside small in size

but it is very near to CPU. And then L2 catch is a very large in very large in size compared to L1. It is it is little

far from CPU. And then L3 catch is very larger than L2. And also it is it is so far from CPU. So there is a lot of kind

of catch memories L1, L2, L3 catch memory. While I'm getting into SOC, I will explain what is L1, L2, what is L2,

what is L3. Okay. So and then catch mapping. So that there's three kind of mapping direct mapping, necessity

mapping, set associative mapping. So direct mapping means one to one mapping. Associative mapping means flexible but

complex. So I will tell you one by one in upcoming classes because it will take more time to explain. So I will show you

another thing. So we'll see that we will till now we are we are seeing this only like control unit A unit and memory unit

only. Okay this is a basic characture I already shown you and then we are enter into risk file. So before that I will

give some difference between the highle language and assembly language. So assembly so we are writing the Python

system C++ these are the coding languages. These are called highle languages. After the compilation, it

will converted into the assembly language. Like it assembly language means it having only instructions. So it

will look like this only. So this is a instruction. These are this is the assembly level language. So it is it

will differ from uh architecture. So one architecture to another architecture will differ from if you are if you're

using the if you are using the ARM architecture it having some assembly language code. If you're using the risk

five means it it having some in section it having some assembly language code. So whether so main thing is highle

languages highle language like a python code or C++ code system code are converted into the assembly languages it

will look like this only. Okay. So here uh I'm going to show difference between the high level and low level. So

high level means C Java system low means risk five architecture assembly language and then ARM architecture assembly

language x86 assembly language this all comes under the comes under the assembly language okay and then complex data

structure so in the as in the highle language we are using the structural array oops concept for highle computing

but in the assembly we mostly use bytes bits and registers means 6 32 2 bit by means 8 bit.

So this is the difference. So here complex controls like ifs nested if for loop but in assembly uh that are in the

form of control transfer instructions branch or jump. Okay, these are the mostly used architectures risk five and

architectures. So and then this is uh this is insection set is for risk five. So reducer instruction set computer

fifth this V is not like a not like a V it is a Roman file it means uh risk f is open source they are developing

continuously in the fifth versions only they are standardized the architectural okay that's why we calling as risk five

so pipelining so I missed that so pipelining means so

in the Here you can see here in the one program count it will fetch data from insection catchy and also it

will fetch data from data catchy. Here we can it will store the data catchy. So main difference of pipeline means uh it

will uh it will do if you're doing one operation and the same time it will do another operation.

So it's like a overlapping. So here overlapping means in the same time fetching the injection which fetching

the instruction from injection catchy and the same time the data also data catchy also are stored in memory access

unit. So in the one program count it will do multiple operations it will do overlapping operations. The overlapping

operation is called pipelining. Okay nice session was it? Yeah, thank you for your response as of so and then we'll

see we'll continue. So these are the instruction ISAs R type I type S type B type J type U type. So

if you want to really if you want if you want to learn uh ISA of risk five means I will I will post dedicated video for

the risk five architecture. Okay, if I take means it is it is very huge topic. So I will just give the overview of ISA

only. So it having a lot of types R type, I type, S type, B type, J type, U type. Okay. And then in the file ISA. So

I already said no registers. So each and every if you're using the 32-bit computer or 64-bit means that 64bit and

32-bit is referring the width of the registers. Okay. So here you can say this is a register.

In the register we are storing the insections. This is our memory. Here also we are giving we here only we are

giving some main insection in this memory in the RAM memory and then we are passing datas from this memory to

registers. So in the arithmetic logic unit will fetch data we'll fetch the instruction from the register and then

not only instruction in the A will fetch the uh instruction and also operence and then operators. So I will show you the

what is operance up code and the operance. Okay. So here we storing the instruction and then datas. For example,

a equal to 5 + 5 means uh in the register we can store the uh instruction addition is one instruction and then we

can store the datas like a five and five we can store here in the instruction in the register and then we'll that

particular alu will fetch the datas from register and then it will do it will do some arithmetic operation it will give

the output for user. So this is the main thing okay of CPU like a computer architectural.

So and then this is insection format. So 0 to I already said no this insection having 32 bit to width. So 0 to six

means op code and then read or write and then functional. So each and function three function one each and function

having some separate operations. Okay. If you read that if you read the injection list is list you can easily

understand. So and then this is address of this RS1 is address RS3 is also an address.

So and then function 7 is also one functionalities. It will do some operations. So I will I'm just showing

that how the how the instruction looks like in the 32-bit. So this is a injection format of 32-bit risk five

processor architectural. So uh this is the main thing. So you can see here load and store. Load

means we are load into register. We are store load means uh this is one register. Uh I'm I'm loading the

whatever it R1 R1 R0 is one register. Whatever it value I'm loading to this a value. So I'm just loading and storing

this assembly code. So main thing is we have the transistor in the chip. So transistor will work based on the zeros

and ones only. Okay. So we have to convert the registers into zeros and ones. This is how that is converting.

Okay. Add. So add appress means that uh you can see here 0 0 means add. Load means 0 1. Store means 1 0 and then load

means 0 1. And then uh this arithmetic operation add subtraction decrement. This all comes under the arithmetic

operation. These are the arithmetic instructions. So that particular arithmetic instruction having some

value. So compine value means 0 0. If it is 0 0 if you are 32 bit means this is 8 bit this is 8 bit this is 8 bit this is

8 bit totally 32 bit width in the last 32 bit last 8 bit of 32 is for arithmetic operations. So it's like a do

I like in section if it is 0 0 means it will do the arithmetic operation. If it is 0 1 means it will do the load

operation. It will one zero means it will do the store operation. Okay. So and then what is catch memory already

set how Python is converted into assembly. So how Python is converted into assembly. So Python having some

interpreter compiler operation it will converting. So that OS that compiler the computer will will convert the uh highle

code into assembly code assembly language and then the computer instruction will it will it will it will

work based on the instruction like a assembly language. So it will do some arithmetic operations based on the zeros

and ones. So this compiler will convert the highle language into machine langu language. Machine lang language is

nothing but assembly code. Assembly language each and every character having some own assembly languages. This

belongs to the architectural what we are using what you are using. So and then so this is the main

difference you can see here this at so 0 0 means so already said no 00 refers to arithmetic operation let's say let's see

only arithmetic assembly operations only. So this is one instruction add is add one addition operation R0 R1. So R0

is refers to the R0 refers to the this register address. This uh this this one memory it having some uh locations we

have to uh like this memory location is called as R0. Register zero means register zero. This is register one,

register two, register three. It will it will go up to 31. Okay. I am doing the addition operation from R 0 and R1.

Okay. This this 0 0 is refers to the arithmetic operation. This 0001.

So this 00 is refers to op code. Op code is nothing but what you are doing addition of separation XR X not or any

separation operation. So each and every operation it having some uh binaries 0 0 0 1 1 0. So for example addition means 0

0 suppression means 0 1 decrement means 1 1. So this op code operations the this is how that computer arature will do

will designed it's designed okay and then uh 0 0 which refers to in the particular in the particular R0 register

it having value of 0 0 and then in the R1 register it having value of 01 so it will do addition operation. So how we

can find means this 000 is refers to. So we totally we having the 32 bit we can split into four like a four bytes. Four

by means this is first bite, second bite, third bite, fourth bite. This fourth by is refers to which operation

like insection or arithmetic operation. This is refers to al. So if it is 0 0 means it is al operation. And then this

is up code operation. So here the third by refers to op code. Up code means inside the alou it having a lot of

operations addition separation multiplication division decrement increment. So kind of there is a lot of

operations to defining that we can use a binaries two bit like a 8 bit binaries 0 0 1 1. So based on that uh we can decide

addition or separation. Okay. And then these are the datas are stored in registers. Okay.

So I will show you another uh yeah I will coming to I think random thoughts make a couple 8 bit data is stored. Yes.

So this is like a 8 bit uh uh 8 bit al 8 bit means it can this is a one designed for 8 example for 8 bit al 8 bit

arithmetic logic unit. It can do add it can do adder it can do subtractor it can do increment it can do increment. Okay.

So here I'm doing here I'm doing the binary decode operation. Okay. Here if it is 0 0 means it will choose this

if it is 0 01. So if like a here I already said no this is the up code. So it can choose the whether what is

operation either addition either subtraction. So based on these two bits like in the third bite based on this

third bite it can choose whether either 8 bit adder 8 bit subtractor 8 bit increment 8 bit decrement. If it is 0 0

means it will do decrement. If it is 01 means it will do increment. If it is 0 1 0 means it will do subtraction. If it is

1 one means it will do addition operation. Okay. So this is how it will work inside the computer. It is very

deep thing. Okay. This is a basic information this is overview of the operation instruction registers. So

first thing is refers to insection it this bit like this bite is refers to uh bit which operation arithmetic operation

or insection operation and then if I'm 0 0 means it I'm it will choose the arithmetic operation. Okay here in the

coming to the third bite if it is 0 0 means it will add. So based on our logic so I'm I I design like this only in real

time there is a lot of logic is there but my logic is based on this third bite if it is 0 0 add operation if it is 0 1

I suppress operation. So by using this binary decoder I can control the operations okay and then this is a data

registers datas from the registers 0 1 1 0 is a 0 0 1 0 1 is datas are stored in my register.

So and then this is look like this only. So after writing the RTL code uh I'm converting the RTL code into gates. It

will look like this only. So inside the 8 bit increment it having some logic gates. So that's I'm telling yesterday

we are writing the RTL code design code. We are test and then we have to we have to test the design code by using the

system V language. So this is a front end work. After that we have to convert the vlog design code into gates that

gates and look like this only like exorgate argate inside the 8 bit increment incrementer decrement

subtractor adder it having some logic gates if I show means it will look like some it look like a logic circuit

itself. So we basically uh it it is a uh logic gates. Okay, we are controlling the logic gates in depth logic gates is

not like a logic gates. It is a transistor. So we are controlling the transistor. This is the main thing. So

how we can control means by using the instructions which is given by user. Okay. The main thing is ISA. ISA will

control the hardware. This is the uh like this topic of this is the main thing of today's sessions instruction

having the in is having instruction uh that that is inside the computer architectural it is we can control the

uh hardware like this. So and then this is a main operation of the up code. So up code means like it

will it will be it having the up code up run one up run two and then it will give the result either positive or negative.

So this is the main flow of computer architectural. So and then it's time for so I think you

guys are understand okay so yes all all register use 8 bit data by combination

what is the maximum storage of register so uh 32 to 64 bit until now in till now current scenario uh CPU architectures

computer are using the 64-bit width of our registers okay so how many registers there needs 051.

So you need to read the data sheet of the you need to read the architectural for that. So I I'm not clear that so I

will tell you tomorrow. So in risk five architectural we totally having the 32 registers 32 registers. Okay. In the RX

5 architectural it will differ from architectural. Risk five magn are not same both are different only. In RX 5 we

having the 32 bit means 32 register means. In natural we having the 60 or 50 something. So we have to read the ar

architectural design. So and then we have to read the spec of uh ISA lot of things. So can you please provide the

notes? Yeah for that's a I'm coming to that point. So if you want to notes if you want to if you want to learn these

things you you want recommendation means you can buy our internship program. So you can convert this master class into

one month internship. Okay. So these are the benefits you will get at the end of the internship like a 30 days exclude

your recording session and then you can download the all the PPTs and you can download the all the resource code like

a source code. So what I'm what I'm doing the session you can download itself you can you can download and then

you will get the exclusive exclusive four projects mini project main project and then you will get the IET

confirmation internship certificate and then you will get the 180 days LMS course access so LMS is a kind of like a

interface and that LMS we have we we having some we having we having store videos recorded videos you can watch up

to 180 days and then we are providing weekly task like a weekly task and assignments and then we are giving the

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one month of internship so and then this is a very discounted fee uh just triple line so our regular fee is 4,000

uh like a 4,999 but our discounted fee is testable line by using this registration link you will get okay and

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this link you can uh purchase the internship program so these are the benefits I already said no so and then

in the once you once you click the once you register the link internship link uh you You will see this window. You can

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certificate. This from the IT. Okay. These are the benefits you will get the uh internship just line. So if

you guys are really interested you can buy the internship by using this link. Okay. So then this is for today. So if

you guys any doubt you can ask now. So better thoughts thank you can you please provide so you can buy the

internship you will get the notes uh GA and then if you guys any if you do you guys any doubt you can ask now so this

is a very basic overview of ISA and risk five architectural okay can I wind up the class.

So register size varies from processor to another processor. For example, 8051 is 8 bit microcontroller size. Yeah,

register size is vary from architectural from what are using architectural. There are lot of architectural in market

architectural Xf86. Okay. It will vary from architectural to

architectural what you are following. So only risk five is only free architectural and the remaining things

architectural and then architecture architecture and then x86 are paid we have to you have to pay for the

architecture. So, so I think do you guys any doubt

so institute of electronics and telecommunication engineering this you can see here uh this is a uh IET

institute of electronics and telecommunication engineering it's like a central government does it comes under

the central government things so this is the certificate you will get from the IET at the end of the internship

program. Okay. So I already said stands for.

So any doubt from your side you can ask now or else I can wind up the class. Yeah. You can get the participation

certificate end of the master class if you want to if you really want to learn the this kind of things. You can uh join

the internship program and you will get the more contents and you can you can get the PPS downloadables

and lots of more and then uh weekly weekly weekly live sessions you can ask those. Okay. Uh thank you guys. Thank

you for listening. We'll see tomorrow with the topic of digital electronics. This is a very basic thing. uh of VS

engineer. Thank you. Thank you guys. Thank you for listening.